!_TAG_FILE_FORMAT	2	/extended format; --format=1 will not append ;" to lines/
!_TAG_FILE_SORTED	1	/0=unsorted, 1=sorted, 2=foldcase/
!_TAG_PROGRAM_AUTHOR	Darren Hiebert	/dhiebert@users.sourceforge.net/
!_TAG_PROGRAM_NAME	Exuberant Ctags	//
!_TAG_PROGRAM_URL	http://ctags.sourceforge.net	/official site/
!_TAG_PROGRAM_VERSION	5.8	//
ARCH	Makefile	/^ARCH=$(shell uname -m | sed s\/i.86\/i86\/)$/;"	m
BOARDFLAG_CH365_04_PORTS	wch_common.h	217;"	d
BOARDFLAG_CH365_08_PORTS	wch_common.h	218;"	d
BOARDFLAG_CH365_32_PORTS	wch_common.h	219;"	d
BOARDFLAG_CH384_28_PORTS	wch_common.h	221;"	d
BOARDFLAG_CH384_8_PORTS	wch_common.h	220;"	d
BOARDFLAG_NONE	wch_common.h	215;"	d
BOARDFLAG_REMAP	wch_common.h	216;"	d
CC	Makefile	/^CC=gcc -c$/;"	m
CH352_FIFOSIZE_16	wch_common.h	243;"	d
CH352_FIFOSIZE_SET	wch_common.h	310;"	d
CH352_TRIGGER_LEVEL_16FIFO_01	wch_common.h	244;"	d
CH352_TRIGGER_LEVEL_16FIFO_04	wch_common.h	245;"	d
CH352_TRIGGER_LEVEL_16FIFO_08	wch_common.h	246;"	d
CH352_TRIGGER_LEVEL_16FIFO_14	wch_common.h	247;"	d
CH352_TRIGGER_LEVEL_SET	wch_common.h	311;"	d
CH353_FIFOSIZE_16	wch_common.h	249;"	d
CH353_FIFOSIZE_SET	wch_common.h	313;"	d
CH353_TRIGGER_LEVEL_16FIFO_01	wch_common.h	250;"	d
CH353_TRIGGER_LEVEL_16FIFO_04	wch_common.h	251;"	d
CH353_TRIGGER_LEVEL_16FIFO_08	wch_common.h	252;"	d
CH353_TRIGGER_LEVEL_16FIFO_14	wch_common.h	253;"	d
CH353_TRIGGER_LEVEL_SET	wch_common.h	314;"	d
CH355_FIFOSIZE_16	wch_common.h	255;"	d
CH355_FIFOSIZE_SET	wch_common.h	316;"	d
CH355_TRIGGER_LEVEL_16FIFO_01	wch_common.h	256;"	d
CH355_TRIGGER_LEVEL_16FIFO_04	wch_common.h	257;"	d
CH355_TRIGGER_LEVEL_16FIFO_08	wch_common.h	258;"	d
CH355_TRIGGER_LEVEL_16FIFO_14	wch_common.h	259;"	d
CH355_TRIGGER_LEVEL_SET	wch_common.h	317;"	d
CH356_FIFOSIZE_16	wch_common.h	261;"	d
CH356_FIFOSIZE_SET	wch_common.h	319;"	d
CH356_TRIGGER_LEVEL_16FIFO_01	wch_common.h	262;"	d
CH356_TRIGGER_LEVEL_16FIFO_04	wch_common.h	263;"	d
CH356_TRIGGER_LEVEL_16FIFO_08	wch_common.h	264;"	d
CH356_TRIGGER_LEVEL_16FIFO_14	wch_common.h	265;"	d
CH356_TRIGGER_LEVEL_SET	wch_common.h	320;"	d
CH357_FIFOSIZE_128	wch_common.h	267;"	d
CH357_FIFOSIZE_SET	wch_common.h	322;"	d
CH357_TRIGGER_LEVEL_128FIFO_01	wch_common.h	268;"	d
CH357_TRIGGER_LEVEL_128FIFO_112	wch_common.h	271;"	d
CH357_TRIGGER_LEVEL_128FIFO_32	wch_common.h	269;"	d
CH357_TRIGGER_LEVEL_128FIFO_64	wch_common.h	270;"	d
CH357_TRIGGER_LEVEL_SET	wch_common.h	323;"	d
CH358_FIFOSIZE_128	wch_common.h	273;"	d
CH358_FIFOSIZE_SET	wch_common.h	325;"	d
CH358_TRIGGER_LEVEL_128FIFO_01	wch_common.h	274;"	d
CH358_TRIGGER_LEVEL_128FIFO_112	wch_common.h	277;"	d
CH358_TRIGGER_LEVEL_128FIFO_32	wch_common.h	275;"	d
CH358_TRIGGER_LEVEL_128FIFO_64	wch_common.h	276;"	d
CH358_TRIGGER_LEVEL_SET	wch_common.h	326;"	d
CH359_FIFOSIZE_128	wch_common.h	279;"	d
CH359_FIFOSIZE_SET	wch_common.h	328;"	d
CH359_TRIGGER_LEVEL_128FIFO_01	wch_common.h	280;"	d
CH359_TRIGGER_LEVEL_128FIFO_112	wch_common.h	283;"	d
CH359_TRIGGER_LEVEL_128FIFO_32	wch_common.h	281;"	d
CH359_TRIGGER_LEVEL_128FIFO_64	wch_common.h	282;"	d
CH359_TRIGGER_LEVEL_SET	wch_common.h	329;"	d
CH382_FIFOSIZE_256	wch_common.h	285;"	d
CH382_FIFOSIZE_SET	wch_common.h	331;"	d
CH382_TRIGGER_LEVEL_256FIFO_01	wch_common.h	286;"	d
CH382_TRIGGER_LEVEL_256FIFO_128	wch_common.h	288;"	d
CH382_TRIGGER_LEVEL_256FIFO_224	wch_common.h	289;"	d
CH382_TRIGGER_LEVEL_256FIFO_32	wch_common.h	287;"	d
CH382_TRIGGER_LEVEL_SET	wch_common.h	332;"	d
CH384_FIFOSIZE_256	wch_common.h	291;"	d
CH384_FIFOSIZE_SET	wch_common.h	334;"	d
CH384_TRIGGER_LEVEL_256FIFO_01	wch_common.h	292;"	d
CH384_TRIGGER_LEVEL_256FIFO_128	wch_common.h	294;"	d
CH384_TRIGGER_LEVEL_256FIFO_224	wch_common.h	295;"	d
CH384_TRIGGER_LEVEL_256FIFO_32	wch_common.h	293;"	d
CH384_TRIGGER_LEVEL_SET	wch_common.h	335;"	d
CH432_FIFOSIZE_16	wch_common.h	297;"	d
CH432_FIFOSIZE_SET	wch_common.h	337;"	d
CH432_TRIGGER_LEVEL_16FIFO_01	wch_common.h	298;"	d
CH432_TRIGGER_LEVEL_16FIFO_04	wch_common.h	299;"	d
CH432_TRIGGER_LEVEL_16FIFO_08	wch_common.h	300;"	d
CH432_TRIGGER_LEVEL_16FIFO_14	wch_common.h	301;"	d
CH432_TRIGGER_LEVEL_SET	wch_common.h	338;"	d
CH438_FIFOSIZE_128	wch_common.h	303;"	d
CH438_FIFOSIZE_SET	wch_common.h	340;"	d
CH438_TRIGGER_LEVEL_128FIFO_01	wch_common.h	304;"	d
CH438_TRIGGER_LEVEL_128FIFO_112	wch_common.h	307;"	d
CH438_TRIGGER_LEVEL_128FIFO_32	wch_common.h	305;"	d
CH438_TRIGGER_LEVEL_128FIFO_64	wch_common.h	306;"	d
CH438_TRIGGER_LEVEL_SET	wch_common.h	341;"	d
DEFAULT_FIFOSIZE	wch_common.h	350;"	d
DEFAULT_TRIGGER_LEVEL	wch_common.h	351;"	d
DEVICE_ID_WCH_CH352_1S1P	wch_common.h	148;"	d
DEVICE_ID_WCH_CH352_2S	wch_common.h	150;"	d
DEVICE_ID_WCH_CH353_2S1P	wch_common.h	154;"	d
DEVICE_ID_WCH_CH353_2S1PAR	wch_common.h	156;"	d
DEVICE_ID_WCH_CH353_4S	wch_common.h	152;"	d
DEVICE_ID_WCH_CH355_4S	wch_common.h	158;"	d
DEVICE_ID_WCH_CH356_4S1P	wch_common.h	160;"	d
DEVICE_ID_WCH_CH356_6S	wch_common.h	162;"	d
DEVICE_ID_WCH_CH356_8S	wch_common.h	164;"	d
DEVICE_ID_WCH_CH357_4S	wch_common.h	166;"	d
DEVICE_ID_WCH_CH358_4S1P	wch_common.h	168;"	d
DEVICE_ID_WCH_CH358_8S	wch_common.h	170;"	d
DEVICE_ID_WCH_CH359_16S	wch_common.h	172;"	d
DEVICE_ID_WCH_CH365_32S	wch_common.h	186;"	d
DEVICE_ID_WCH_CH382_2S	wch_common.h	174;"	d
DEVICE_ID_WCH_CH382_2S1P	wch_common.h	176;"	d
DEVICE_ID_WCH_CH384_28S	wch_common.h	184;"	d
DEVICE_ID_WCH_CH384_4S	wch_common.h	178;"	d
DEVICE_ID_WCH_CH384_4S1P	wch_common.h	180;"	d
DEVICE_ID_WCH_CH384_8S	wch_common.h	182;"	d
DRIVERNAME	Makefile	/^DRIVERNAME := wch$/;"	m
DRIVERNAME	Makefile	/^DRIVERNAME :=wch$/;"	m
INTERRUPT_COUNT	wch_common.h	370;"	d
KDIR	Makefile	/^KDIR	:= \/lib\/modules\/$(shell uname -r)\/build$/;"	m
KERNEL_VERSION	wch_common.h	9;"	d
MODULE	wch_common.h	3;"	d
MOD_DEC_USE_COUNT	wch_common.h	21;"	d
MOD_INC_USE_COUNT	wch_common.h	20;"	d
NONE_BOARD	wch_common.h	/^	NONE_BOARD = 0,$/;"	e	enum:__anon1
PARMS	Makefile	/^PARMS= -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O2 \\$/;"	m
PCI_ANY_ID	wch_common.h	35;"	d
PORTFLAG_CH365_04_PORTS	wch_common.h	226;"	d
PORTFLAG_CH365_08_PORTS	wch_common.h	227;"	d
PORTFLAG_CH365_32_PORTS	wch_common.h	228;"	d
PORTFLAG_CH384_28_PORTS	wch_common.h	230;"	d
PORTFLAG_CH384_8_PORTS	wch_common.h	229;"	d
PORTFLAG_NONE	wch_common.h	224;"	d
PORTFLAG_REMAP	wch_common.h	225;"	d
PORT_SER_16450	wch_common.h	483;"	d
PORT_SER_16550	wch_common.h	484;"	d
PORT_SER_16550A	wch_common.h	485;"	d
PORT_SER_16650	wch_common.h	487;"	d
PORT_SER_16650V2	wch_common.h	488;"	d
PORT_SER_16750	wch_common.h	489;"	d
PORT_SER_8250	wch_common.h	482;"	d
PORT_SER_CIRRUS	wch_common.h	486;"	d
PORT_SER_MAX_UART	wch_common.h	490;"	d
PORT_SER_UNKNOWN	wch_common.h	481;"	d
PWD	Makefile	/^PWD	:= $(shell pwd)$/;"	m
READ_INTERRUPT_VECTOR_BYTE	wch_serial.c	/^READ_INTERRUPT_VECTOR_BYTE($/;"	f	file:
READ_INTERRUPT_VECTOR_DWORD	wch_serial.c	/^READ_INTERRUPT_VECTOR_DWORD($/;"	f	file:
READ_INTERRUPT_VECTOR_WORD	wch_serial.c	/^READ_INTERRUPT_VECTOR_WORD($/;"	f	file:
READ_UART_IIR	wch_serial.c	/^READ_UART_IIR($/;"	f	file:
READ_UART_LCR	wch_serial.c	/^READ_UART_LCR($/;"	f	file:
READ_UART_LSR	wch_serial.c	/^READ_UART_LSR($/;"	f	file:
READ_UART_MSR	wch_serial.c	/^READ_UART_MSR($/;"	f	file:
READ_UART_RX	wch_serial.c	/^READ_UART_RX($/;"	f	file:
RELEVANT_IFLAG	wch_serial.c	2201;"	d	file:
SUB_DEVICE_ID_WCH_CH352_1S1P	wch_common.h	149;"	d
SUB_DEVICE_ID_WCH_CH352_2S	wch_common.h	151;"	d
SUB_DEVICE_ID_WCH_CH353_2S1P	wch_common.h	155;"	d
SUB_DEVICE_ID_WCH_CH353_2S1PAR	wch_common.h	157;"	d
SUB_DEVICE_ID_WCH_CH353_4S	wch_common.h	153;"	d
SUB_DEVICE_ID_WCH_CH355_4S	wch_common.h	159;"	d
SUB_DEVICE_ID_WCH_CH356_4S1P	wch_common.h	161;"	d
SUB_DEVICE_ID_WCH_CH356_6S	wch_common.h	163;"	d
SUB_DEVICE_ID_WCH_CH356_8S	wch_common.h	165;"	d
SUB_DEVICE_ID_WCH_CH357_4S	wch_common.h	167;"	d
SUB_DEVICE_ID_WCH_CH358_4S1P	wch_common.h	169;"	d
SUB_DEVICE_ID_WCH_CH358_8S	wch_common.h	171;"	d
SUB_DEVICE_ID_WCH_CH359_16S	wch_common.h	173;"	d
SUB_DEVICE_ID_WCH_CH365_32S	wch_common.h	187;"	d
SUB_DEVICE_ID_WCH_CH382_2S	wch_common.h	175;"	d
SUB_DEVICE_ID_WCH_CH382_2S1P	wch_common.h	177;"	d
SUB_DEVICE_ID_WCH_CH384_28S	wch_common.h	185;"	d
SUB_DEVICE_ID_WCH_CH384_4S	wch_common.h	179;"	d
SUB_DEVICE_ID_WCH_CH384_4S1P	wch_common.h	181;"	d
SUB_DEVICE_ID_WCH_CH384_8S	wch_common.h	183;"	d
SUB_VENDOR_ID_WCH_PCI	wch_common.h	147;"	d
SUB_VENDOR_ID_WCH_PCIE	wch_common.h	145;"	d
UART_DEFAULT_FCR	wch_common.h	348;"	d
UART_IIR_CTO	wch_common.h	357;"	d
UART_LSR_ERR_IN_RFIFO	wch_common.h	355;"	d
UART_MCR_AFE	wch_common.h	356;"	d
UART_TRIGGER00_FCR	wch_common.h	343;"	d
UART_TRIGGER01_FCR	wch_common.h	344;"	d
UART_TRIGGER10_FCR	wch_common.h	345;"	d
UART_TRIGGER11_FCR	wch_common.h	346;"	d
VENDOR_ID_WCH_PCI	wch_common.h	146;"	d
VENDOR_ID_WCH_PCIE	wch_common.h	144;"	d
WAKEUP_CHARS	wch_common.h	371;"	d
WCHTERMIOS	wch_common.h	375;"	d
WCHTERMIOS	wch_common.h	377;"	d
WCH_BOARDNAME_LENGTH	wch_common.h	390;"	d
WCH_BOARDS_MAX	wch_common.h	233;"	d
WCH_BOARD_CH352_1S1P	wch_common.h	/^	WCH_BOARD_CH352_1S1P,	$/;"	e	enum:__anon1
WCH_BOARD_CH352_2S	wch_common.h	/^	WCH_BOARD_CH352_2S,$/;"	e	enum:__anon1
WCH_BOARD_CH353_2S1P	wch_common.h	/^	WCH_BOARD_CH353_2S1P,$/;"	e	enum:__anon1
WCH_BOARD_CH353_2S1PAR	wch_common.h	/^	WCH_BOARD_CH353_2S1PAR,$/;"	e	enum:__anon1
WCH_BOARD_CH353_4S	wch_common.h	/^	WCH_BOARD_CH353_4S,$/;"	e	enum:__anon1
WCH_BOARD_CH355_4S	wch_common.h	/^	WCH_BOARD_CH355_4S,$/;"	e	enum:__anon1
WCH_BOARD_CH356_4S1P	wch_common.h	/^	WCH_BOARD_CH356_4S1P,$/;"	e	enum:__anon1
WCH_BOARD_CH356_6S	wch_common.h	/^	WCH_BOARD_CH356_6S,$/;"	e	enum:__anon1
WCH_BOARD_CH356_8S	wch_common.h	/^	WCH_BOARD_CH356_8S,$/;"	e	enum:__anon1
WCH_BOARD_CH357_4S	wch_common.h	/^	WCH_BOARD_CH357_4S,$/;"	e	enum:__anon1
WCH_BOARD_CH358_4S1P	wch_common.h	/^	WCH_BOARD_CH358_4S1P,$/;"	e	enum:__anon1
WCH_BOARD_CH358_8S	wch_common.h	/^	WCH_BOARD_CH358_8S,$/;"	e	enum:__anon1
WCH_BOARD_CH359_16S	wch_common.h	/^	WCH_BOARD_CH359_16S,$/;"	e	enum:__anon1
WCH_BOARD_CH365_32S	wch_common.h	/^	WCH_BOARD_CH365_32S,$/;"	e	enum:__anon1
WCH_BOARD_CH382_2S	wch_common.h	/^	WCH_BOARD_CH382_2S,$/;"	e	enum:__anon1
WCH_BOARD_CH382_2S1P	wch_common.h	/^	WCH_BOARD_CH382_2S1P,$/;"	e	enum:__anon1
WCH_BOARD_CH384_28S	wch_common.h	/^	WCH_BOARD_CH384_28S,$/;"	e	enum:__anon1
WCH_BOARD_CH384_4S	wch_common.h	/^	WCH_BOARD_CH384_4S,$/;"	e	enum:__anon1
WCH_BOARD_CH384_4S1P	wch_common.h	/^	WCH_BOARD_CH384_4S1P,$/;"	e	enum:__anon1
WCH_BOARD_CH384_8S	wch_common.h	/^	WCH_BOARD_CH384_8S,$/;"	e	enum:__anon1
WCH_DBG	wch_common.h	110;"	d
WCH_DBG_BOARD	wch_common.h	112;"	d
WCH_DBG_SERIAL	wch_common.h	111;"	d
WCH_DBG_SERPORT	wch_common.h	113;"	d
WCH_DRIVERVERSION_LENGTH	wch_common.h	391;"	d
WCH_DRIVER_AUTHOR	wch_common.h	102;"	d
WCH_DRIVER_AUTHOR	wch_main.c	/^MODULE_AUTHOR(WCH_DRIVER_AUTHOR);$/;"	v
WCH_DRIVER_DATE	wch_common.h	101;"	d
WCH_DRIVER_DESC	wch_common.h	103;"	d
WCH_DRIVER_DESC	wch_main.c	/^MODULE_DESCRIPTION(WCH_DRIVER_DESC);$/;"	v
WCH_DRIVER_VERSION	wch_common.h	100;"	d
WCH_ENABLE_MS	wch_common.h	543;"	d
WCH_HIGH_BITS_OFFSET	wch_serial.c	9;"	d	file:
WCH_IOCTL	wch_common.h	472;"	d
WCH_PCICFG_BAR_TOTAL	wch_common.h	364;"	d
WCH_PORT_ONBOARD_MAX	wch_common.h	234;"	d
WCH_SERIAL_INLINE	wch_common.h	507;"	d
WCH_SER_ADDRESS_LENGTH	wch_common.h	361;"	d
WCH_SER_BAUD_NOTSETSER	wch_common.h	382;"	d
WCH_SER_BAUD_SETSERIAL	wch_common.h	381;"	d
WCH_SER_DEVNUM	wch_common.h	547;"	d
WCH_SER_DEVNUM	wch_common.h	549;"	d
WCH_SER_DUMP_DRIVER_VER	wch_common.h	475;"	d
WCH_SER_DUMP_PORT_INFO	wch_common.h	473;"	d
WCH_SER_DUMP_PORT_PERF	wch_common.h	474;"	d
WCH_SER_TOTAL_MAX	wch_common.h	235;"	d
WCH_TTY_MAJOR	wch_common.h	105;"	d
WCH_UART_CONFIG_IRQ	wch_common.h	495;"	d
WCH_UART_CONFIG_TYPE	wch_common.h	494;"	d
WCH_UART_XMIT_SIZE	wch_common.h	497;"	d
WCH_UIF_CHECK_CD	wch_common.h	536;"	d
WCH_UIF_CTS_FLOW	wch_common.h	537;"	d
WCH_UIF_INITIALIZED	wch_common.h	540;"	d
WCH_UIF_NORMAL_ACTIVE	wch_common.h	539;"	d
WCH_UPF_BUGGY_UART	wch_common.h	529;"	d
WCH_UPF_CHANGE_MASK	wch_common.h	532;"	d
WCH_UPF_HARDPPS_CD	wch_common.h	527;"	d
WCH_UPF_LOW_LATENCY	wch_common.h	528;"	d
WCH_UPF_MAGIC_MULTIPLIER	wch_common.h	530;"	d
WCH_UPF_SAK	wch_common.h	519;"	d
WCH_UPF_SKIP_TEST	wch_common.h	526;"	d
WCH_UPF_SPD_CUST	wch_common.h	523;"	d
WCH_UPF_SPD_HI	wch_common.h	521;"	d
WCH_UPF_SPD_MASK	wch_common.h	520;"	d
WCH_UPF_SPD_SHI	wch_common.h	524;"	d
WCH_UPF_SPD_VHI	wch_common.h	522;"	d
WCH_UPF_SPD_WARP	wch_common.h	525;"	d
WCH_UPF_USR_MASK	wch_common.h	533;"	d
WCH_UPIO_MEM	wch_common.h	517;"	d
WCH_UPIO_PORT	wch_common.h	516;"	d
WCH_USF_CLOSING_WAIT_INF	wch_common.h	492;"	d
WCH_USF_CLOSING_WAIT_NONE	wch_common.h	493;"	d
WRITE_UART_DLL	wch_serial.c	/^WRITE_UART_DLL($/;"	f	file:
WRITE_UART_DLM	wch_serial.c	/^WRITE_UART_DLM($/;"	f	file:
WRITE_UART_FCR	wch_serial.c	/^WRITE_UART_FCR($/;"	f	file:
WRITE_UART_IER	wch_serial.c	/^WRITE_UART_IER($/;"	f	file:
WRITE_UART_LCR	wch_serial.c	/^WRITE_UART_LCR($/;"	f	file:
WRITE_UART_MCR	wch_serial.c	/^WRITE_UART_MCR($/;"	f	file:
WRITE_UART_TX	wch_serial.c	/^WRITE_UART_TX($/;"	f	file:
WRITE_XINT_DISABLE_IRQ	wch_serial.c	/^WRITE_XINT_DISABLE_IRQ($/;"	f	file:
WRITE_XINT_ENABLE_IRQ	wch_serial.c	/^WRITE_XINT_ENABLE_IRQ($/;"	f	file:
_INLINE_	wch_common.h	511;"	d
_INLINE_	wch_common.h	513;"	d
_ser_put_char	wch_serial.c	/^_ser_put_char($/;"	f	file:
_ser_start	wch_serial.c	/^_ser_start($/;"	f	file:
bar1	wch_common.h	/^	int bar1;$/;"	m	struct:port
bar2	wch_common.h	/^	int bar2;$/;"	m	struct:port
bar_addr	wch_common.h	/^	unsigned int bar_addr[WCH_PCICFG_BAR_TOTAL];$/;"	m	struct:wch_board
base_info	wch_common.h	/^	unsigned int  base_info;		$/;"	m	struct:ser_port_info
baud_base	wch_common.h	/^	unsigned int baud_base;		$/;"	m	struct:ser_port
blocked_open	wch_common.h	/^	int blocked_open;$/;"	m	struct:ser_info
board_enum	wch_common.h	/^	int board_enum;$/;"	m	struct:ser_port
board_enum	wch_common.h	/^	int board_enum;$/;"	m	struct:wch_board
board_flag	wch_common.h	/^	unsigned int board_flag;$/;"	m	struct:pci_board
board_flag	wch_common.h	/^	unsigned int board_flag;$/;"	m	struct:wch_board
board_membase	wch_common.h	/^	void *board_membase;$/;"	m	struct:ser_port
board_membase	wch_common.h	/^	void *board_membase;$/;"	m	struct:wch_board
board_name	wch_common.h	/^	char board_name[WCH_BOARDNAME_LENGTH];$/;"	m	struct:pci_board
board_name_info	wch_common.h	/^	char board_name_info[WCH_BOARDNAME_LENGTH];$/;"	m	struct:ser_port_info
board_number	wch_common.h	/^	int board_number;$/;"	m	struct:wch_board
brk	wch_common.h	/^	__u32 brk;$/;"	m	struct:ser_icount
buf_overrun	wch_common.h	/^	__u32 buf_overrun;$/;"	m	struct:ser_icount
bus_number	wch_common.h	/^	unsigned int bus_number;		$/;"	m	struct:ser_port
bus_number	wch_common.h	/^	unsigned int bus_number;$/;"	m	struct:wch_board
bus_number_info	wch_common.h	/^	unsigned int  bus_number_info;$/;"	m	struct:ser_port_info
capabilities	wch_common.h	/^	unsigned int capabilities;	$/;"	m	struct:wch_ser_port
ch365_32s	wch_main.c	/^unsigned char ch365_32s = 0;$/;"	v
ch365_32s_test	wch_main.c	/^ch365_32s_test($/;"	f
chip_flag	wch_common.h	/^	unsigned char chip_flag;$/;"	m	struct:ser_port
chip_flag	wch_common.h	/^	unsigned int chip_flag;$/;"	m	struct:port
chip_iobase	wch_common.h	/^	unsigned int chip_iobase;$/;"	m	struct:ser_port
clear_mctrl	wch_serial.c	555;"	d	file:
close_delay	wch_common.h	/^	unsigned int close_delay;$/;"	m	struct:ser_state
closing_wait	wch_common.h	/^	unsigned int closing_wait;$/;"	m	struct:ser_state
count	wch_common.h	/^	int count;$/;"	m	struct:ser_state
cts	wch_common.h	/^	__u32 cts;$/;"	m	struct:ser_icount
custom_divisor	wch_common.h	/^	unsigned int custom_divisor;$/;"	m	struct:ser_port
dbg_serial	wch_common.h	/^dbg_serial($/;"	f
dcd	wch_common.h	/^	__u32 dcd;$/;"	m	struct:ser_icount
delta_msr_wait	wch_common.h	/^	wait_queue_head_t delta_msr_wait;$/;"	m	struct:ser_info
dev_name	wch_common.h	/^	const char *dev_name;$/;"	m	struct:ser_driver
dev_number	wch_common.h	/^	unsigned int dev_number;	$/;"	m	struct:ser_port
dev_number	wch_common.h	/^	unsigned int dev_number;$/;"	m	struct:wch_board
dev_number_info	wch_common.h	/^	unsigned int  dev_number_info;$/;"	m	struct:ser_port_info
device	wch_main.c	/^		unsigned short device;$/;"	m	struct:wch_pci_info	file:
device_id	wch_common.h	/^	unsigned int device_id;$/;"	m	struct:pci_board
driver_data	wch_main.c	/^		unsigned short driver_data;$/;"	m	struct:wch_pci_info	file:
dsr	wch_common.h	/^	__u32 dsr;$/;"	m	struct:ser_icount
fifosize	wch_common.h	/^	unsigned int fifosize;		$/;"	m	struct:ser_port
flags	wch_common.h	/^	unsigned int flags;$/;"	m	struct:ser_info
flags	wch_common.h	/^	unsigned int flags;$/;"	m	struct:ser_port
frame	wch_common.h	/^	__u32 frame;$/;"	m	struct:ser_icount
icount	wch_common.h	/^	struct ser_icount icount;			$/;"	m	struct:ser_port	typeref:struct:ser_port::ser_icount
ier	wch_common.h	/^	unsigned char ier;$/;"	m	struct:wch_ser_port
ignore_status_mask	wch_common.h	/^	unsigned int ignore_status_mask;	$/;"	m	struct:ser_port
info	wch_common.h	/^	struct ser_info *info;			$/;"	m	struct:ser_port	typeref:struct:ser_port::ser_info
info	wch_common.h	/^	struct ser_info *info;$/;"	m	struct:ser_state	typeref:struct:ser_state::ser_info
intr_vector_bar	wch_common.h	/^	unsigned int intr_vector_bar;$/;"	m	struct:pci_board
intr_vector_offset	wch_common.h	/^	unsigned int intr_vector_offset;$/;"	m	struct:pci_board
intr_vector_offset_1	wch_common.h	/^	unsigned int intr_vector_offset_1;$/;"	m	struct:pci_board
intr_vector_offset_2	wch_common.h	/^	unsigned int intr_vector_offset_2;$/;"	m	struct:pci_board
intr_vector_offset_3	wch_common.h	/^	unsigned int intr_vector_offset_3;$/;"	m	struct:pci_board
iobase	wch_common.h	/^	unsigned int iobase;$/;"	m	struct:ser_port
iotype	wch_common.h	/^	unsigned char iotype;			$/;"	m	struct:ser_port
irq	wch_common.h	/^	unsigned int irq;$/;"	m	struct:ser_port
irq	wch_common.h	/^	unsigned int irq;$/;"	m	struct:wch_board
irq_info	wch_common.h	/^	unsigned int  irq_info;	$/;"	m	struct:ser_port_info
lcr	wch_common.h	/^	unsigned char lcr;$/;"	m	struct:wch_ser_port
ldisc_stop_rx	wch_common.h	/^	unsigned char ldisc_stop_rx;	$/;"	m	struct:ser_port
length1	wch_common.h	/^	unsigned char length1;$/;"	m	struct:port
length2	wch_common.h	/^	unsigned char length2;$/;"	m	struct:port
line	wch_common.h	/^	unsigned int line;			$/;"	m	struct:ser_port
list	wch_common.h	/^	struct list_head list;	$/;"	m	struct:wch_ser_port	typeref:struct:wch_ser_port::list_head
lock	wch_common.h	/^	spinlock_t lock;$/;"	m	struct:ser_port
lsr_break_flag	wch_common.h	/^	unsigned char lsr_break_flag;$/;"	m	struct:wch_ser_port
major	wch_common.h	/^	int major;$/;"	m	struct:ser_driver
mcr	wch_common.h	/^	unsigned char mcr;$/;"	m	struct:wch_ser_port
mcr_force	wch_common.h	/^	unsigned char mcr_force;	$/;"	m	struct:wch_ser_port
mcr_mask	wch_common.h	/^	unsigned char mcr_mask;	$/;"	m	struct:wch_ser_port
mctrl	wch_common.h	/^	unsigned int mctrl;			$/;"	m	struct:ser_port
minor	wch_common.h	/^	int minor;$/;"	m	struct:ser_driver
nr	wch_common.h	/^	int	nr;$/;"	m	struct:ser_driver
num_serport	wch_common.h	/^	unsigned int num_serport;$/;"	m	struct:pci_board
offset1	wch_common.h	/^	unsigned int offset1;$/;"	m	struct:port
offset2	wch_common.h	/^	unsigned int offset2;$/;"	m	struct:port
open_wait	wch_common.h	/^	wait_queue_head_t open_wait;$/;"	m	struct:ser_info
overrun	wch_common.h	/^	__u32 overrun;$/;"	m	struct:ser_icount
parity	wch_common.h	/^	__u32 parity;$/;"	m	struct:ser_icount
pb_info	wch_common.h	/^	struct pci_board pb_info;$/;"	m	struct:ser_port	typeref:struct:ser_port::pci_board
pb_info	wch_common.h	/^    struct pci_board pb_info;$/;"	m	struct:wch_board	typeref:struct:wch_board::pci_board
pci_board	wch_common.h	/^struct pci_board {$/;"	s
pdev	wch_common.h	/^	struct pci_dev *pdev;$/;"	m	struct:wch_board	typeref:struct:wch_board::pci_dev
port	wch_common.h	/^	struct port port[WCH_PORT_ONBOARD_MAX];$/;"	m	struct:pci_board	typeref:struct:pci_board::port
port	wch_common.h	/^	struct ser_port *port;$/;"	m	struct:ser_state	typeref:struct:ser_state::ser_port
port	wch_common.h	/^	struct ser_port port;$/;"	m	struct:wch_ser_port	typeref:struct:wch_ser_port::ser_port
port	wch_common.h	/^struct port {$/;"	s
port_flag	wch_common.h	/^	unsigned int port_flag;$/;"	m	struct:ser_port
port_info	wch_common.h	/^	unsigned int  port_info;$/;"	m	struct:ser_port_info
port_membase	wch_common.h	/^	void *port_membase;$/;"	m	struct:ser_port
read_status_mask	wch_common.h	/^	unsigned int read_status_mask;	$/;"	m	struct:ser_port
rng	wch_common.h	/^	__u32 rng;$/;"	m	struct:ser_icount
rx	wch_common.h	/^	__u32 rx;$/;"	m	struct:ser_icount
rx_trigger	wch_common.h	/^	int rx_trigger;	$/;"	m	struct:ser_port
sem	wch_common.h	/^	struct semaphore sem;		$/;"	m	struct:ser_state	typeref:struct:ser_state::semaphore
ser_block_til_ready	wch_serial.c	/^ser_block_til_ready($/;"	f	file:
ser_break_ctl	wch_serial.c	/^ser_break_ctl($/;"	f	file:
ser_change_speed	wch_serial.c	/^ser_change_speed($/;"	f	file:
ser_chars_in_buffer	wch_serial.c	/^ser_chars_in_buffer($/;"	f	file:
ser_check_modem_status	wch_serial.c	/^ser_check_modem_status($/;"	f	file:
ser_circ_chars_free	wch_common.h	502;"	d
ser_circ_chars_pending	wch_common.h	501;"	d
ser_circ_clear	wch_common.h	500;"	d
ser_circ_empty	wch_common.h	499;"	d
ser_close	wch_serial.c	/^ser_close($/;"	f	file:
ser_driver	wch_common.h	/^struct ser_driver {$/;"	s
ser_flush_buffer	wch_serial.c	/^ser_flush_buffer($/;"	f	file:
ser_flush_chars	wch_serial.c	/^ser_flush_chars($/;"	f	file:
ser_get	wch_serial.c	/^ser_state *ser_get($/;"	f	file:
ser_get_baud_rate	wch_serial.c	/^ser_get_baud_rate($/;"	f
ser_get_count	wch_serial.c	/^ser_get_count($/;"	f	file:
ser_get_divisor	wch_serial.c	/^ser_get_divisor($/;"	f
ser_get_info	wch_serial.c	/^ser_get_info($/;"	f	file:
ser_get_lsr_info	wch_serial.c	/^ser_get_lsr_info($/;"	f	file:
ser_get_modem_info	wch_serial.c	/^ser_get_modem_info($/;"	f	file:
ser_handle_break	wch_common.h	/^ser_handle_break($/;"	f
ser_handle_cts_change	wch_serial.c	/^ser_handle_cts_change($/;"	f	file:
ser_handle_dcd_change	wch_common.h	/^ser_handle_dcd_change($/;"	f
ser_handle_port	wch_serial.c	/^ser_handle_port($/;"	f	file:
ser_hangup	wch_serial.c	/^ser_hangup($/;"	f	file:
ser_icount	wch_common.h	/^struct ser_icount {$/;"	s
ser_info	wch_common.h	/^struct ser_info {$/;"	s
ser_insert_char	wch_common.h	/^ser_insert_char($/;"	f
ser_ioctl	wch_serial.c	/^ser_ioctl($/;"	f	file:
ser_isr	wch_common.h	/^	int	(*ser_isr)(struct wch_board *, struct wch_ser_port *);$/;"	m	struct:wch_board
ser_open	wch_serial.c	/^ser_open($/;"	f	file:
ser_port	wch_common.h	/^struct ser_port {$/;"	s
ser_port_index	wch_common.h	/^	unsigned int ser_port_index;$/;"	m	struct:wch_board
ser_port_info	wch_common.h	/^struct ser_port_info {$/;"	s
ser_ports	wch_common.h	/^	unsigned int ser_ports; $/;"	m	struct:wch_board
ser_put_char	wch_serial.c	/^ser_put_char($/;"	f	file:
ser_receive_chars	wch_serial.c	/^ser_receive_chars($/;"	f	file:
ser_refcount	wch_serial.c	/^static int ser_refcount;$/;"	v	file:
ser_send_xchar	wch_serial.c	/^ser_send_xchar($/;"	f	file:
ser_set_info	wch_serial.c	/^ser_set_info($/;"	f	file:
ser_set_modem_info	wch_serial.c	/^ser_set_modem_info($/;"	f	file:
ser_set_termios	wch_serial.c	/^ser_set_termios($/;"	f	file:
ser_shutdown	wch_serial.c	/^ser_shutdown($/;"	f	file:
ser_start	wch_serial.c	/^ser_start($/;"	f	file:
ser_startup	wch_serial.c	/^ser_startup($/;"	f	file:
ser_state	wch_common.h	/^struct ser_state {$/;"	s
ser_stop	wch_serial.c	/^ser_stop($/;"	f	file:
ser_tasklet_action	wch_serial.c	/^ser_tasklet_action($/;"	f	file:
ser_termios	wch_serial.c	/^static struct termios *ser_termios[WCH_SER_TOTAL_MAX + 1];$/;"	v	typeref:struct:termios	file:
ser_termios_locked	wch_serial.c	/^static struct termios *ser_termios_locked[WCH_SER_TOTAL_MAX + 1];$/;"	v	typeref:struct:termios	file:
ser_throttle	wch_serial.c	/^ser_throttle($/;"	f	file:
ser_tiocmget	wch_serial.c	/^ser_tiocmget($/;"	f	file:
ser_tiocmset	wch_serial.c	/^ser_tiocmset($/;"	f	file:
ser_transmit_chars	wch_serial.c	/^ser_transmit_chars($/;"	f	file:
ser_tty	wch_serial.c	/^static struct tty_struct *ser_tty[WCH_SER_TOTAL_MAX + 1];$/;"	v	typeref:struct:tty_struct	file:
ser_tx_stopped	wch_common.h	503;"	d
ser_unthrottle	wch_serial.c	/^ser_unthrottle($/;"	f	file:
ser_update_mctrl	wch_serial.c	/^ser_update_mctrl($/;"	f	file:
ser_update_termios	wch_serial.c	/^ser_update_termios($/;"	f	file:
ser_update_timeout	wch_serial.c	/^ser_update_timeout($/;"	f	file:
ser_wait_modem_status	wch_serial.c	/^ser_wait_modem_status($/;"	f	file:
ser_wait_until_sent	wch_serial.c	/^ser_wait_until_sent($/;"	f	file:
ser_write	wch_serial.c	/^ser_write($/;"	f	file:
ser_write_room	wch_serial.c	/^ser_write_room($/;"	f	file:
ser_write_wakeup	wch_serial.c	/^ser_write_wakeup($/;"	f	file:
set_mctrl	wch_serial.c	554;"	d	file:
setserial_flag	wch_common.h	/^	unsigned int setserial_flag;$/;"	m	struct:ser_port
state	wch_common.h	/^	struct ser_state *state;$/;"	m	struct:ser_driver	typeref:struct:ser_driver::ser_state
sub_device_id	wch_common.h	/^	unsigned int sub_device_id;$/;"	m	struct:pci_board
sub_vendor_id	wch_common.h	/^	unsigned int sub_vendor_id;$/;"	m	struct:pci_board
subdevice	wch_main.c	/^		unsigned short subdevice;$/;"	m	struct:wch_pci_info	file:
subvendor	wch_main.c	/^		unsigned short subvendor;$/;"	m	struct:wch_pci_info	file:
timeout	wch_common.h	/^	unsigned int timeout;$/;"	m	struct:ser_port
timer	wch_common.h	/^	struct timer_list timer;	$/;"	m	struct:wch_ser_port	typeref:struct:wch_ser_port::timer_list
tlet	wch_common.h	/^	struct tasklet_struct tlet;$/;"	m	struct:ser_info	typeref:struct:ser_info::tasklet_struct
tmpbuf	wch_common.h	/^	unsigned char *tmpbuf;$/;"	m	struct:ser_info
tmpbuf_sem	wch_common.h	/^	struct semaphore tmpbuf_sem;$/;"	m	struct:ser_info	typeref:struct:ser_info::semaphore
tty	wch_common.h	/^	struct tty_struct *tty;$/;"	m	struct:ser_info	typeref:struct:ser_info::tty_struct
tty_driver	wch_common.h	/^	struct tty_driver *tty_driver;$/;"	m	struct:ser_driver	typeref:struct:ser_driver::tty_driver
tty_driver	wch_common.h	/^    struct tty_driver tty_driver;$/;"	m	struct:ser_driver	typeref:struct:ser_driver::tty_driver
tx	wch_common.h	/^	__u32 tx;$/;"	m	struct:ser_icount
type	wch_common.h	/^	char type;$/;"	m	struct:port
type	wch_common.h	/^	unsigned int type;			$/;"	m	struct:ser_port
uartclk	wch_common.h	/^	unsigned int uartclk;		$/;"	m	struct:ser_port
vector	wch_common.h	/^	unsigned int vector;$/;"	m	struct:ser_port
vector_mask	wch_common.h	/^	unsigned int vector_mask;$/;"	m	struct:ser_port
vector_mask	wch_common.h	/^	unsigned int vector_mask;$/;"	m	struct:wch_board
vendor	wch_main.c	/^		unsigned short vendor;$/;"	m	struct:wch_pci_info	file:
vendor_id	wch_common.h	/^	unsigned int vendor_id;$/;"	m	struct:pci_board
wch_assign_resource	wch_main.c	/^wch_assign_resource($/;"	f	file:
wch_board	wch_common.h	/^struct wch_board {$/;"	s
wch_board_table	wch_main.c	/^struct wch_board wch_board_table[WCH_BOARDS_MAX];$/;"	v	typeref:struct:wch_board
wch_debug	wch_main.c	/^wch_debug($/;"	f
wch_exit	wch_main.c	/^module_exit(wch_exit);$/;"	v
wch_exit	wch_main.c	/^wch_exit($/;"	f	file:
wch_get_pci_board_conf	wch_main.c	/^wch_get_pci_board_conf($/;"	f	file:
wch_init	wch_main.c	/^module_init(wch_init);$/;"	v
wch_init	wch_main.c	/^wch_init($/;"	f	file:
wch_interrupt	wch_main.c	/^	wch_interrupt($/;"	f	file:
wch_iounmap	wch_main.c	/^wch_iounmap($/;"	f
wch_pci_board_conf	wch_devtable.c	/^struct pci_board wch_pci_board_conf[] = {$/;"	v	typeref:struct:pci_board
wch_pci_board_id	wch_main.c	/^	static struct pci_device_id wch_pci_board_id[] = {$/;"	v	typeref:struct:pci_device_id	file:
wch_pci_board_id	wch_main.c	/^	static struct wch_pci_info wch_pci_board_id[] = {$/;"	v	typeref:struct:wch_pci_info	file:
wch_pci_board_probe	wch_main.c	/^wch_pci_board_probe($/;"	f	file:
wch_pci_info	wch_main.c	/^	struct wch_pci_info {$/;"	s	file:
wch_register_irq	wch_main.c	/^wch_register_irq($/;"	f
wch_release_irq	wch_main.c	/^wch_release_irq($/;"	f
wch_ser_add_one_port	wch_serial.c	/^wch_ser_add_one_port($/;"	f	file:
wch_ser_break_ctl	wch_serial.c	/^wch_ser_break_ctl($/;"	f	file:
wch_ser_configure_port	wch_serial.c	/^wch_ser_configure_port($/;"	f	file:
wch_ser_enable_ms	wch_serial.c	/^wch_ser_enable_ms($/;"	f	file:
wch_ser_get_divisor	wch_serial.c	/^wch_ser_get_divisor($/;"	f	file:
wch_ser_get_mctrl	wch_serial.c	/^wch_ser_get_mctrl($/;"	f	file:
wch_ser_interrupt	wch_serial.c	/^wch_ser_interrupt($/;"	f
wch_ser_port	wch_common.h	/^struct wch_ser_port {$/;"	s
wch_ser_port_table_init	wch_main.c	/^wch_ser_port_table_init($/;"	f	file:
wch_ser_port_total_cnt	wch_main.c	/^static int wch_ser_port_total_cnt; \/\/ ܴ$/;"	v	file:
wch_ser_reg	wch_main.c	/^static struct ser_driver wch_ser_reg = {$/;"	v	typeref:struct:ser_driver	file:
wch_ser_register_driver	wch_serial.c	/^wch_ser_register_driver($/;"	f
wch_ser_register_ports	wch_serial.c	/^wch_ser_register_ports($/;"	f
wch_ser_release_io	wch_serial.c	/^wch_ser_release_io($/;"	f	file:
wch_ser_remove_one_port	wch_serial.c	/^wch_ser_remove_one_port($/;"	f	file:
wch_ser_request_io	wch_serial.c	/^wch_ser_request_io($/;"	f	file:
wch_ser_set_mctrl	wch_serial.c	/^wch_ser_set_mctrl($/;"	f	file:
wch_ser_set_termios	wch_serial.c	/^wch_ser_set_termios($/;"	f	file:
wch_ser_shutdown	wch_serial.c	/^wch_ser_shutdown($/;"	f	file:
wch_ser_start_tx	wch_serial.c	/^wch_ser_start_tx($/;"	f	file:
wch_ser_startup	wch_serial.c	/^wch_ser_startup($/;"	f	file:
wch_ser_stop_rx	wch_serial.c	/^wch_ser_stop_rx($/;"	f	file:
wch_ser_stop_tx	wch_serial.c	/^wch_ser_stop_tx($/;"	f	file:
wch_ser_table	wch_main.c	/^struct wch_ser_port wch_ser_table[WCH_SER_TOTAL_MAX + 1];$/;"	v	typeref:struct:wch_ser_port
wch_ser_timeout	wch_serial.c	/^wch_ser_timeout($/;"	f	file:
wch_ser_tx_empty	wch_serial.c	/^wch_ser_tx_empty($/;"	f	file:
wch_ser_unconfigure_port	wch_serial.c	/^wch_ser_unconfigure_port($/;"	f	file:
wch_ser_unregister_driver	wch_serial.c	/^wch_ser_unregister_driver($/;"	f
wch_ser_unregister_ports	wch_serial.c	/^wch_ser_unregister_ports($/;"	f
wch_ser_users	wch_serial.c	10;"	d	file:
wch_tty_ops	wch_serial.c	/^static struct tty_operations wch_tty_ops = {$/;"	v	typeref:struct:tty_operations	file:
wch_uart_config	wch_serial.c	/^static const struct serial_uart_config wch_uart_config[PORT_SER_MAX_UART + 1] = {$/;"	v	typeref:struct:serial_uart_config	file:
x_char	wch_common.h	/^	unsigned char x_char;			$/;"	m	struct:ser_port
xmit	wch_common.h	/^	struct circ_buf xmit;$/;"	m	struct:ser_info	typeref:struct:ser_info::circ_buf
